180nm NMOSvoltage-controlled oscillator for phase-locked loop applications

Abstract

The   voltage-controlled   oscillator   (VCO)   is   the   primary   device   in   the phase-locked  loop (PLL) to  produce  the  local  oscillator  frequency.  The excessive  phase  noise  of VCOsis  the  primary  cause  of  PLL  performance loss. This paper proposes the design and optimization of low phase noise and low power consumption for a 180nmN-channel metal-oxide semiconductor NMOSVCO    for    PLL    applications    with P-channel    metal-oxide semiconductor PMOSvaractors and spiral inductors. At 2V supply voltage, the  optimized NMOS VCO  has  a  power  consumption  of  21mW,  a  phase noise of -130dBc/Hz at 1MHz offset and a total harmonic distortion (THD) of  3.9%.  The  proposed  design  is  verified  by  PSpicesimulations.  A  new criterion is proposed for optimizing NMOS LC oscillators.